A thin film transistor is a kind of a field-effect transistor and is mainly applied to an active matrix liquid crystal display and an active matrix organic EL display.
At present the mainstream of the thin film transistor is a polysilicon thin film transistor in which polycrystalline silicon is used for a semiconductor layer and an amorphous silicon thin film transistor in which amorphous silicon is used for a semiconductor layer.
With regard to the polysilicon thin film transistor in which the mobility of electrons is several hundred times greater than that of the amorphous silicon thin film transistor, not only a technology for a type formed at high temperatures but also a technology for a type formed at low temperatures has been completed, and the increase in size thereof which has been difficult is now expected to be realized.
On the other hand, the amorphous silicon thin film transistor can be produced in a large area and at low temperatures (300 to 400° C.) and has therefore become a mainstream of the thin film transistor and is utilized in various fields.
In recent years, as a new kind of a thin film transistor, a thin film transistor in which a transparent oxide polycrystalline thin film mainly formed of ZnO is used for a semiconductor layer is actively developed (Japanese Patent Application Laid-Open No. 2002-076356).
Since the above-mentioned thin film can be formed at low temperatures and is transparent with respect to visible light, a flexible transparent thin film transistor can be formed on a substrate such as a plastic plate or a film.
K. Nomura et al., Nature, Vol. 432 (2004-11), pp. 488-492 discloses a technology of using a transparent amorphous oxide semiconductor formed of indium, gallium, zinc, and oxygen for a semiconductor layer of a thin film transistor. Furthermore, it also describes that a flexible transparent thin film transistor having a large mobility can be formed on a substrate such as a polyethylene terephthalate (PET) film at room temperature.
One problem which arises when a thin film transistor is produced and used is the so-called “hump” which appears in drain current (Ids)—gate voltage (Vgs) characteristics (transfer characteristics). FIG. 1B illustrates typical transfer characteristics of a thin film transistor in which a hump is observed.
The occurrence of the hump makes conspicuous such malfunctions that a threshold value which is necessary for operating a circuit cannot be obtained or an operating point of the circuit is shifted.
For example, a driving thin film transistor in a pixel circuit of an active matrix drive organic EL display controls the emission intensity of an organic EL device by a current which flows between a drain and a source thereof. Therefore, if a hump is formed, a malfunction occurs in which a desired emission intensity cannot be obtained.
Japanese Patent Application Laid-Open Nos. 2003-197915 and 2007-200930 disclose a mechanism of forming a hump in a polysilicon thin film transistor.
More specifically, in a polysilicon thin film transistor, when there is a mesa isolation structure, a sub-channel transistor is formed in a semiconductor layer region which overlaps a gate electrode. In the sub-channel transistor, a current path is formed at a pattern edge or vicinity of a semiconductor film. The term “mesa isolation structure” herein employed refers to an isolation structure thorough mesa isolation.
In a thin film transistor having a mesa isolation structure, because an electric field concentrates on a side wall portion of a semiconductor film, the side wall portion acts as a sub-channel which is not designed, and current begins to flow through the sub-channel at a lower voltage than through a channel of the thin film transistor (becomes ON state).
Therefore, in the transfer characteristics of the TFT, abnormal current characteristics (hump) appear because the sub-channel transistor is turned on (also called “parasitic characteristics”).
In order to solve this problem, in Japanese Patent Application Laid-Open No. 2003-197915, by preventing pattern edges from overlapping each other in a channel region of a semiconductor film, formation of a hump in the transfer characteristics is suppressed.
Furthermore, in Japanese Patent Application Laid-Open No. 2007-200930, by providing a thick side wall protection film on a pattern edge of a semiconductor film to thereby effectively reduce the intensity of an electric field applied to a sub-channel transistor, formation of a hump in the transfer characteristics is suppressed.
However, in the case of the above-mentioned thin film transistor in which an oxide semiconductor is used for a semiconductor layer, the mechanism of operation of the transistor is different from that of a polysilicon thin film transistor.
T. Miyasato et al., Applied Physics Letters, 86 (2005), p. 162902 discloses that a thin film transistor in which an oxide semiconductor is used for a semiconductor layer becomes OFF state by the phenomenon that a channel portion of a semiconductor film is completely depleted by application of an electric field. In other words, as the electric field is more intensely applied, the OFF state is maintained more stably.
Therefore, in the case of a thin film transistor in which an oxide semiconductor is used for a semiconductor layer, it is considered that there exists another factor for formation of a hump in the transfer characteristics than the sub-channel transistor present at pattern edges of the semiconductor film.
In the light of T. Miyasato et al., Applied Physics Letters, 86 (2005), p. 162902, there is a high probability that a hump in the transfer characteristics of a thin film transistor in which an oxide semiconductor is used for a semiconductor layer is formed due to the following factor. That is, it is considered that an interface region (back gate interface) of a semiconductor film which is opposite to an interface being in contact with a gate insulating film is different in film quality from the inside of the semiconductor film, a current path is formed.
The problem associated with a hump resulting from the back gate interface is not disclosed in Japanese Patent Application Laid-Open Nos. 2003-197915 and 2007-200930.
Meanwhile, for the purpose of preventing degradation of a thin film transistor during a device production step after formation of the thin film transistor, a protective layer is generally provided. However, particularly in a bottom gate thin film transistor, because there is only the protective layer on the semiconductor layer, if the protective layer does not function sufficiently, the back gate interface may be modified to cause a hump in the transfer characteristics.